INMOS B008 Transputer Evaluation Board Rev E
|Home > Browse Our Collection > Computers > INMOS > INMOS B008 Transputer ... valuation Board Rev E|
This INMOS B008 PC Board was designed to plug into a standard IBM-compatible PC and allow it to control up to ten Transputer Modules ("TRAMs"). While different motherboards were developed for different host systems, the TRAMs were universal modules, each hosting a Transputer processor and up to four megabytes of RAM. Multiple B008 cards could be installed in a single PC, each chained together and controlled by a single 'master' board. Each TRAM could also act as a master controller for a separate subsystem of Transputer modules. All Transputer processors require a standard 5MHz external clock - high-frequency clocks are internally derived from this. The B008 Transputer processors internally run at 20MHz.
The motherboard contained an IMST212A processor and an IMSC004B processor to handle communications between the TRAMs and the PC interface.
The IMST212A is a 16-bit processor containing 2KB on-chip RAM; up to 64KB external RAM is supported. It incorporates a pre-emptive microcoded scheduler, enabling any number of concurrent processes to be executed without a software kernel. Two hardware timers are available with 1-microsecond and 64-microsecond precision, respectively. Four identical bi-directional serial links are the 212's interface to the outside world. Each link has input and output channels, with TTL compatible signals at a standard 10Mbit/sec.
The IMS C004 is a transparent programmable link switch designed to provide a full crossbar switch between 32 link inputs and 32 link outputs. The IMS C004 will switch links running at either the standard speed of 10 Mbits/sec or at the higher speed of 20 Mbit/sec. It introduces, on average, only a 1.75 bit time delay on the signal.
This B008 motherboard is fully populated with four double-width TRAMs and two single-width. The TRAMs are:
Comment on This Page
INMOS B008 Transputer Evaluation Board Rev E Manuals:
Magazines RELATED to INMOS B008 Transputer Evaluation Board Rev E in our Library
This exhibit has a reference ID of CH36061. Please quote this reference ID in any communication with the Centre for Computing History.
Click on the Image(s) For Detail