INMOS Technical Note 6: IMS T800 architecture

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IMS T800 architecture

INMOS Bristol

15 pages.

1. Introduction
2. IMS T800 architecture
2.1 Instruction encoding
2.2 Floating point instructions
2.3 Optimising use of the stack
2.4 Concurrent operation of FPU and CPU
3. Floating point unit design
4. Floating point performance
5. Formal methods ensure correctness and quick design
5.1 Z specification
5.2 High level occam implementation
5.3 Low level occam implementation
5.4 Flattened low level implementation
5.5 Microcode
5.6 Summary
6. Improved link performance
7. Graphics capability
7.1 Instruction description
7.2 Drawing coloured text
8. Conclusion

Reference Number :

Date Published : March 1987

Manufacturer : INMOS

Platform : Transputer






This exhibit has a reference ID of CH40208. Please quote this reference ID in any communication with the Centre for Computing History.

INMOS Technical Note 6: IMS T800 architecture

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